The operating frequencies of integrated circuits such as memory devices are progressively increasing. To take advantage of these high frequencies computing systems are designed to transmit signals along their busses and between system components at comparable frequencies.
Some difficulties may be encountered when transmitting and receiving data between system components (e.g., between integrated circuits) at high frequencies. Buses behave like transmission lines, where impedance mismatches lead to signal reflection and interference effects. Termination resistance can be used to maintain signal quality over interconnections by matching impedances to minimize signal reflections.
Some conventional memory systems, such as double data rate (DDR) 2 systems use on-die termination to mitigate the signal degradation. The term “on-die termination (ODT)” refers to a termination resistance that is resident on the integrated circuit (e.g., on the controller and/or on the memory device). The value of ODT may be set when a computing system is initialized. After initialization, the ODT can be activated or deactivated with the value that is set during initialization.
In conventional systems, the decision to use a termination mode is based on the signal integrity requirements for the desired maximum operating frequency. The term “termination mode” refers to using termination on one or both sides of an interconnect. When operating in a termination mode, the termination may be constantly on or it may be dynamically turned on and off (e.g., when transmit and/or receive data is sent over the interconnect). The termination mode is frequently used to support the high data rates of conventional systems. The use of the termination mode incurs a significant price in terms of power consumption. For example, a termination mode may support a lower impedance current path that may result in power consumption both when signals are toggling on the interconnect and when they are held constant on the interconnect.